Nuvia
General Summary:
Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.3-6yrs of Experience in Custom Analog Layouts
Minimum 3+ years of experience in SerDes Blocks like PLL, Tx and Rx.
Finfet Experience is mandatory.
Knowledge in Cadence Skills Scripting, Totem ESD flows are added advantage
Need to Possess Good Attitude and team playe
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