Company:
Qualcomm Europe, Inc., Greek Branch Office
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Job Description
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm GPU ASIC Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate with cross-functional teams to meet and exceed customer needs.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Verification skills: Formal verification (Static) and Dynamic (simulations)
Formal tools – Jasper, VC-formal, OneSpin, QuestaFormal
System Verilog/SVA, Verilog or VHDL, Scripting skills
Preferred Qualifications:
Knowledge of abstractions, constraints, equivalence checking etc
Apps in formal tools (Low power, X-prop, Conectivity checking etc)
Design debug, Deep bug hunting
Design knowledge of CPU, GPU, Bus/Noc/Interconnect, Memory Controllers, Caches
Principal Duties and Responsibilities:
Deploying Industry-Leading Verification Methodologies
Test plan development based on Design documents and interaction with design/systems engineers
Writing and debugging SystemVerilog assertions
Analyzing coverage data and working with Design teams to address coverage holes
Develop/augment framework for running regressions
Running/Debugging Power aware simulations
Debugging regression failures with design/Systems teams
Support integration of design in higher-level subsystem including test planning, test vector delivery, and debug of test vectors at the integration level
Python/Perl automation for improving workflows and team efficiency
Participate in project reviews
Level of Responsibility:
Provides supervision/guidance to other team members.
Decision-making is significant in nature and affects work beyond immediate work group.
Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.
Requires verbal and written communication skills to convey complex information.
Has influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Preferred Qualifications:
• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
• 9+ years of ASIC design, verification, validation, integration, or related work experience.
• 3+ years of experience with architecture and design tools.
• 3+ years of experience with scripting tools and programming languages.
• 3+ years of experience with design verification methods.
• 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Principal Duties and Responsibilities:
• Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
• Creates highly advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
• Evaluates all aspects of highly complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC Packages.
• Writes detailed technical documentation for highly complex EDA/IP/ASIC projects; reviews technical documentation for junior engineers.
Level of Responsibility:
• Provides supervision/guidance to other team members.
• Decision-making is significant in nature and affects work beyond immediate work group.
• Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.
• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
• Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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