FY26 Intern - Emulation of a secure CPU core in QEMU - 6 months, France

Nuvia

Nuvia

Montbonnot-Saint-Martin, France
Posted on Oct 15, 2025

Job Description

Job Posting Date

2025-10-15


Company:

Qualcomm France S.A.R.L.

Job Area:

Interns Group, Interns Group > Interim Intern

General Summary:

Short Description about the role

The Qualcomm team in Montbonnot (France) is focusing on High-Assurance Security IPs for integration into System-on-Chips (SoC). Composed of multiple profiles – Embedded Software, Hardware Design, Cryptography, Security, Certification – the team has been developing TESIC, a Secure Enclave, composed of a proprietary CPU core, memories, analog security sensors, and crypto-accelerators. It is completed by a Software Development Kit (SDK). Both TESIC IP and TESIC SDK include security protections against physical attacks (Fault Injection and Side-Channel Attacks).

The internship will work within the Software team, to port the proprietary CPU core – named TAM16 – in the QEMU emulator. The purpose is to develop an emulated version of the TESIC IP, running on x86 computers, for validation purposes.

Minimum Qualifications

License in Computer Sciences, with courses in C/C++ and assembly programming.

Preferred Qualifications

Knowledge in processor architecture.

Eligibility requirements - Education/which semester and year of graduation

Internship for Master 1 or Master 2.

Location

Qualcomm Montbonnot

110 Rue Blaise Pascal

38330 Montbonnot-Saint-Martin

France

Internship Duration

Minimum 3 months, 6 months is preferred.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

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