Company:
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
Job Overview：
The Senior Bench Test Engineer is responsible for end‑to‑end post‑silicon validation and characterization of RF and other IP blocks, including Wi‑Fi, Bluetooth, UWB, AD/DA converters, PLLs, PMIC, PCIe, PON, and related subsystems. This role owns the planning, execution, and automation of chip‑level validation to ensure that both IP and full chip meet functional, performance, and reliability requirements. The engineer will work closely with design, system, ATE, and operations teams to validate functionality, characterize performance, debug complex issues, drive root‑cause analysis, and support product ramp to high‑volume production.
Duties / Responsibilities：
1. Test Planning & Characterization Solutions
- Develop comprehensive test plans covering functionality and performance for Wi‑Fi, Bluetooth, UWB, AD/DA, PLL, PMIC, PCIe, PON, and other key IP blocks at the chip level.
- Based on the available lab hardware and software environment, define complete, clear, and efficient characterization solutions for the above test cases.
2. Test Environment & Automation Development
- Build and maintain lab test environments for wireless and high‑speed interface validation, including Wi‑Fi/Bluetooth/UWB setups and PCIe/PON platforms.
- Develop automated test flows and programs (e.g., LabVIEW, C#, Python) to execute characterization test suites.
- Integrate measurement instruments (VST, SMU, BERT, oscilloscopes, logic analyzers, VNAs/PNAs, spectrum/network analyzers) into automated workflows for robust data collection and analysis.
3. Post‑Silicon Validation & Characterization
- Execute functional and performance tests for Wi‑Fi, Bluetooth, UWB, and other wireless connectivity blocks.
- Validate AD/DA, PLL, and PMIC behavior, including key performance metrics and corner conditions.
- Perform electrical validation of high‑speed interfaces (PCIe, USB, PON, and other SerDes‑based links).
4. Debug, Analysis & Issue Closure
- Capture and analyze logs and measurement data to identify anomalies; reproduce issues with targeted test cases.
- Work closely with design, system, and ATE teams to localize root causes and drive corrective actions.
- Prepare clear data‑review reports and validation summaries, track issues to closure, and provide risk assessments for tape‑out or CS milestones.
5. Production & NPI (New Product Introduction) Support
- Support the transition from engineering validation to high‑volume production, including test condition definition, screening strategies, and yield/reliability improvement.
- Provide technical support for RMA chip analysis and fast resolution of field or customer‑returned issues.
6. Documentation, Process & Continuous Improvement
- Produce and maintain documentation for test plans, test procedures, lab setups, and automation flows.
- Analyze validation data to identify systematic issues and propose improvements in design, test methodology, and automation infrastructure.
- Mentor junior engineers in validation methodology, lab best practices, and automation best practices as needed.
Qualifications：
- Bachelor’s degree or above in Electrical Engineering, Electronics, Communications, Microelectronics, Computer Engineering, or a related field.
- Solid experience (typically 4+ years) in post‑silicon validation, chip‑level/system‑level testing, or ATE‑based wireless/RF/mixed‑signal testing.
- Strong understanding of wireless communication and connectivity technologies, especially Wi‑Fi (e.g., 802.11ax/be), Bluetooth/BLE, and preferably UWB.
- Practical experience in testing or validating high‑speed interfaces such as PCIe, PON, and USB, with familiarity with SerDes‑based PHY concepts.
- Knowledge of mixed‑signal and power‑management IP such as ADC/DAC, PLL, and PMIC, and their key performance metrics.
- Hands‑on experience with RF and mixed‑signal lab equipment (e.g., VST, SMU, signal generators, spectrum/network analyzers, oscilloscopes, logic analyzers, BERT).
- Proficiency in LabVIEW or at least one programming language (e.g., C#, Python); capable of developing automated test flow tools (e.g., TestStand) and data‑analysis tools
- Strong problem‑solving skills, with the ability to debug complex cross‑domain issues (RF / mixed‑signal / digital) and to work independently as well as in cross‑functional teams.
- Good written and verbal communication skills in both Chinese and English for documenting test plans, reporting results, and collaborating with cross‑site teams.
- Experience applying data‑analysis or basic ML techniques to large validation datasets for outlier detection or parametric optimization is a strong plus.
- Prior experience leading validation activities, owning complex test domains, or mentoring junior engineers is preferred.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
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